Services & Technologies

Hardware Analysis Services

For a wide variety of multicore processors and accelerators we identify and characterize the main critical configuration settings (CCS), interference channels (ICH), and available hardware event monitors (HEMs); all pillars of a successful multicore certification process. Our technology provides means for performance testing and freedom from interference assessment.

Microbenchmark Technology

Specifically designed code snippets that put a configurable load on the desired ICHs to validate a wide variety of timing requirements, from isolation properties to the maximum contention on an ICH.


Multicore contention modeling

Obtain fast estimates of multicore contention (interference) impact on co-running tasks’ execution time. Highly recommended in early design stages to explore different task/process to core mapping and data-code to memory mapping.

Surrogate Applications

Specialized micro-benchmarks that stress the ICHs as a reference application does. Help tightening WCET estimates by adjusting the load on the ICHs to the actual expected load, and ease robustness testing tailoring micro-benchmark characteristics.


Maspatechnologies Helps Airbus Pass Multicore Certification on NXP T2080

Maspatechnologies contributed to AIRBUS A3R certification with our micro-benchmark technology (which reached DO-330 qualification in the scope of the A3R project) being successfully deployed to support timing analysis and characterization of Multicore Interference (CAST 32A, A(M)C 20-193) . Find out more here including quotes from Maspatechnologies team leader (Francisco J. Cazorla) and Airbus team leader (Andrés Morán Valero) in the project.

View combined press release
Target industrial domains


The increased performance needs of automotive applications can only be met with the processing power brought by heterogeneous MultiProcessors Systems on Chip (MPSoCs). MPSoC usage, however, confronts with the challenges stemming from holistic performance optimizations of multiple applications, and the need to provide evidence for safety requirements adherence, including freedom from interference.

Learn more on how our technologies can help


Identifying and setting right values for the critical configuration settings; identifying and quantifying interference channels; providing evidence of the correctness of hardware event monitors (performance monitoring counters); are all key traits to show adherence to CAST-32A.

Learn more on how our certifiable technologies and processes help

White Papers & Brochures

White Papers

Browse and download a copy of our latest white papers on multicore timing analysis and how Maspatechnologies tools and expertise can support the qualification and certification of time-critical systems.


Download focused brochures and informative materials to gain a better insight on  Maspatechnologies tools and services, and to better understand how these could help in your multicore timing analysis project.

Main Partners

Rapita Systems Ltd

Maspastechnologies works with Rapita Systems Ltd in  providing our expertise and tools for all the activities related to analysis and characterization of interference channels in MCP (multicore processors) according to applicable safety standards (AMC 20-193 for avionics and ISO 26262 for automotive).

Rapita Systems Inc

Maspastechnologies works with Rapita Systems Inc in projects for the American market to cover all aspects related to hardware analysis and characterization for multicore-time analysis in the avionics market according to AMC 20-193.